The original list from bioscentral.com seems to have gone down as of January 2024, so we’ve recompiled that list down below.
Last updated: 24th Jan 2024
The beep codes are represented in the number of beeps. E.g. 1-1-2 would mean 1 beep, a pause, 1 beep, a pause, and 2 beeps.
- With a Dell computer, a 1-2 beep code can also indicate that a bootable add-in card is installed but no boot device is attached. For example, in you insert a Promise Ultra-66 card but do not connect a hard drive to it, you will get the beep code.
3-part beep codes
| Beeps | Error Message | Description |
| 1-1-2 | CPU test failure | The CPU is faulty. Replace the CPU |
| Low 1-1-2 | System board select failure | The motherboard is having an undetermined fault. Replace the motherboard |
| 1-1-3 | CMOS read/write error | The real time clock/CMOS is faulty. Replace the CMOS if possible |
| Low 1-1-3 | Extended CMOS RAM failure | The extended portion of the CMOS RAM has failed. Replace the CMOS if possible |
| 1-1-4 | BIOS ROM checksum error | The BIOS ROM has failed. Replace the BIOS or upgrade if possible |
| 1-2-1 | PIT failure | The programmable interrupt timer has failed. Replace if possible |
| 1-2-2 | DMA failure | The DMA controller has failed. Replace the IC if possible |
| 1-2-3 | DMA read/write failure | The DMA controller has failed. Replace the IC if possible |
| 1-3-1 | RAM refresh failure | The RAM refresh controller has failed |
| 1-3-2 | 64KB RAM failure | The test of the first 64KB RAM has failed to start |
| 1-3-3 | First 64KB RAM failure | The first RAM IC has failed. Replace the IC if possible |
| 1-3-4 | First 64KB logic failure | The first RAM control logic has failed |
| 1-4-1 | Address line failure | The address line to the first 64KB RAM has failed |
| 1-4-2 | Parity RAM failure | The first RAM IC has failed. Replace if possible |
| 1-4-3 | EISA fail-safe timer test | Replace the motherboard |
| 1-4-4 | EISA NMI port 462 test | Replace the motherboard |
| 2-1-1 | 64KB RAM failure | Bit 0; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-1-2 | 64KB RAM failure | Bit 1; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-1-3 | 64KB RAM failure | Bit 2; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-1-4 | 64KB RAM failure | Bit 3; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-2-1 | 64KB RAM failure | Bit 4; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-2-2 | 64KB RAM failure | Bit 5; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-2-3 | 64KB RAM failure | Bit 6; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-2-4 | 64KB RAM failure | Bit 7; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-3-1 | 64KB RAM failure | Bit 8; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-3-2 | 64KB RAM failure | Bit 9; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-3-3 | 64KB RAM failure | Bit 10; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-3-4 | 64KB RAM failure | Bit 11; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-4-1 | 64KB RAM failure | Bit 12; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-4-2 | 64KB RAM failure | Bit 13; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-4-3 | 64KB RAM failure | Bit 14; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 2-4-4 | 64KB RAM failure | Bit 15; This data bit on the first RAM IC has failed. Replace the IC if possible |
| 3-1-1 | Slave DMA register failure | The DMA controller has failed. Replace the controller if possible |
| 3-1-2 | Master DMA register failure | The DMA controller had failed. Replace the controller if possible |
| 3-1-3 | Master interrupt mask register failure | The interrupt controller IC has failed |
| 3-1-4 | Slave interrupt mask register failure | The interrupt controller IC has failed |
| 3-2-2 | Interrupt vector error | The BIOS was unable to load the interrupt vectors into memory. Replace the motherboard |
| 3-2-3 | Reserved | |
| 3-2-4 | Keyboard controller failure | The keyboard controller has failed. Replace the IC if possible |
| 3-3-1 | CMOS RAM power bad | Replace the CMOS battery or CMOS RAM if possible |
| 3-3-2 | CMOS configuration error | The CMOS configuration has failed. Restore the configuration or replace the battery if possible |
| 3-3-3 | Reserved | |
| 3-3-4 | Video memory failure | There is a problem with the video memory. Replace the video adapter if possible |
| 3-4-1 | Video initialization failure | There is a problem with the video adapter. Reseat the adapter or replace the adapter if possible |
| 4-2-1 | Timer failure | The system’s timer IC has failed. Replace the IC if possible |
| 4-2-2 | Shutdown failure | The CMOS has failed. Replace the CMOS IC if possible |
| 4-2-3 | Gate A20 failure | The keyboard controller has failed. Replace the IC if possible |
| 4-2-4 | Unexpected interrupt in protected mode | This is a CPU problem. Replace the CPU and retest |
| 4-3-1 | RAM test failure | System RAM addressing circuitry is faulty. Replace the motherboard |
| 4-3-3 | Interval timer channel 2 failure | The system timer IC has failed. Replace the IC if possible |
| 4-3-4 | Time of day clock failure | The real time clock/CMOS has failed. Replace the CMOS if possible |
| 4-4-1 | Serial port failure | A error has occurred in the serial port circuitry |
| 4-4-2 | Parallel port failure | A error has occurred in the parallel port circuitry |
| 4-4-3 | Math coprocessor failure | The math coprocessor has failed. If possible, replace the MPU |
4-part beep codes
| Beeps | Description |
| 1-1-1-3 | Verify real mode |
| 1-1-2-1 | Get CPU type |
| 1-1-2-3 | Initialize system hardware |
| 1-1-3-1 | Initialize chipset registers with initial values |
| 1-1-3-2 | Set in POST flag |
| 1-1-3-3 | Initialize CPU registers |
| 1-1-4-1 | Initialize cache to initial values |
| 1-1-4-3 | Initialize I/O |
| 1-2-1-1 | Initialize power management |
| 1-2-1-2 | Load alternative registers with initial POST values |
| 1-2-1-3 | Jump to UserPatch0 |
| 1-2-2-1 | Initialize timer initialization |
| 1-2-3-1 | 8254 timer initialization |
| 1-2-3-3 | 8237 DMA controller initialization |
| 1-2-4-1 | Reset Programmable Interrupt Controller |
| 1-3-1-1 | Test DRAM refresh |
| 1-3-1-3 | Test 8742 Keyboard Controller |
| 1-3-2-1 | Set ES segment register to 4GB |
| 1-3-3-1 | Autosize DRAM |
| 1-3-3-3 | Clear 512K base memory |
| 1-3-4-1 | Test 512K base address lines |
| 1-3-4-3 | Test 51K base memory |
| 1-4-1-3 | Test CPU bus-clock frequency |
| 1-4-2-1 | CMOS RAM read/write failure (this commonly indicates a problem on the ISA bus such as a card not seated) |
| 1-4-2-4 | Reinitialize the chipset |
| 1-4-3-1 | Shadow system BIOS ROM |
| 1-4-3-2 | Reinitialize the cache |
| 1-4-3-3 | Autosize the cache |
| 1-4-4-1 | Configure advanced chipset registers |
| 1-4-4-2 | Load alternate registers with CMOS values |
| 2-1-1-1 | Set initial CPU speed |
| 2-1-1-3 | Initialize interrupt vectors |
| 2-1-2-1 | Initialize BIOS interrupts |
| 2-1-2-3 | Check ROM copyright notice |
| 2-1-2-4 | Initialize manager for PCI Options ROMs |
| 2-1-3-1 | Check video configuration against CMOS |
| 2-1-3-2 | Initialize PCI bus and devices |
| 2-1-3-3 | initialize all video adapters in system |
| 2-1-4-1 | Shadow video BIOS ROM |
| 2-1-4-3 | Display copyright notice |
| 2-2-1-1 | Display CPU type and speed |
| 2-2-1-3 | Test keyboard |
| 2-2-2-1 | Set key click if enabled |
| 2-2-2-3 | Enable keyboard |
| 2-2-3-1 | Test for unexpected interrupts |
| 2-2-3-3 | Display prompt “Press F2 to enter setup” |
| 2-2-4-1 | Test RAM between 512K and 640K |
| 2-3-1-1 | Test expanded memory |
| 2-3-1-3 | Test extended memory address lines |
| 2-3-2-1 | Jump to UserPatch1 |
| 2-3-2-3 | Enable external and CPU caches |
| 2-3-2-3 | Configure advanced cache registers |
| 2-3-3-1 | Enable external and CPU caches |
| 2-3-3-2 | Initialize SMI handler |
| 2-3-3-3 | Display external cache size |
| 2-3-4-1 | Display shadow message |
| 2-3-4-3 | Display non-disposable segments |
| 2-4-1-1 | Display error messages |
| 2-4-1-3 | Check for configuration errors |
| 2-4-2-1 | Test real-time clock |
| 2-4-2-3 | Check for keyboard errors |
| 2-4-4-1 | Setup hardware interrupt vectors |
| 2-4-4-3 | Test coprocessor if present |
| 3-1-1-1 | Disable onboard I/O ports |
| 3-1-1-3 | Detect and install external RS232 ports |
| 3-1-2-1 | Detect and install external parallel ports |
| 3-1-2-3 | Reinitialize onboard I/O ports |
| 3-1-3-1 | Initialize BIOS Data Area |
| 3-1-3-3 | Initialize Extended BIOS Data Area |
| 3-1-4-1 | Initialize floppy controller |
| 3-2-1-1 | Initialize hard disk controller |
| 3-2-1-2 | Initialize local bus hard disk controller |
| 3-2-1-3 | Jump to UserPatch2 |
| 3-2-2-1 | Disable A20 address line |
| 3-2-2-3 | Clear huge ES segment register |
| 3-2-3-1 | Search for option ROMs |
| 3-2-3-3 | Shadow option ROMs |
| 3-2-4-1 | Setup power management |
| 3-2-4-3 | Enable hardware interrupts |
| 3-3-1-1 | Set time of day |
| 3-3-1-3 | Check key lock |
| 3-3-3-1 | Erase F2 prompt |
| 3-3-3-3 | Scan for F2 keystroke |
| 3-3-4-1 | Enter SETUP |
| 3-3-4-3 | Clear in-POST flag |
| 3-4-1-1 | Check for errors |
| 3-4-1-3 | POST done – prepare to boot operating system |
| 3-4-2-1 | One beep |
| 3-4-2-3 | Check password (optional) |
| 3-4-3-1 | Clear global descriptor table |
| 3-4-4-1 | Clear parity checkers |
| 3-4-4-3 | Check virus and backup reminders |
| 4-1-1-1 | Try to boot with INT 19 |
| 4-2-1-1 | Interrupt handler error |
| 4-2-1-3 | Unknown interrupt error |
| 4-2-2-1 | Pending interrupt error |
| 4-2-2-3 | Initialize option ROM error |
| 4-2-3-1 | Shutdown error |
| 4-2-3-3 | Extended Block Move |
| 4-2-4-1 | Shutdown 10 error |
| 4-2-4-3 | Keyboard Controller failure (most likely problem is with RAM or cache unless no video is present) |
| 4-3-1-3 | Initialize the chipset |
| 4-3-1-4 | Initialize refresh counter |
| 4-3-2-1 | Check for Forced Flash |
| 4-3-2-2 | BIOS ROM is OK |
| 4-3-2-4 | Do a complete RAM test |
| 4-3-3-1 | Do OEM initialization |
| 4-3-3-2 | Initialize interrupt controller |
| 4-3-3-3 | Read in bootstrap code |
| 4-3-3-4 | Initialize all vectors |
| 4-3-4-2 | Initialize the boot device |
| 4-3-4-3 | Boot code was read OK |
POST codes
Version XT 2.52 PnP
| 01 | Test 8253 timer |
| 02 | First 64K RAM failed |
| 03 | First 1K parity check failed |
| 04 | Initialize 8259 interrupt controller |
| 05 | Second 1K RAM test, BIOS data area, failed |
Version 1.0 or Phoenix BIOS Plus
| 01 | CPU register test in progress |
| 02 | CMOS read/write failure |
| 03 | ROM BIOS checksum failure |
| 04 | Programmable interval timer failure |
| 05 | DMA initialization failure |
| 06 | DMA page register read/write failure |
| 08 | RAM refresh verification failure |
| 09 | First 64K RAM test in progress |
| 0A | First 64K RAM chip or data line failure multi-bit |
| 0B | First 64K RAM odd/even parity logic failure |
| 0C | Address line failure in first 64K RAM |
| 0D | Parity failure in first 64K RAM |
| 10 | Bit 0 first 64K RAM failure |
| 11 | Bit 1 first 64K RAM failure |
| 12 | Bit 2 first 64K RAM failure |
| 13 | Bit 3 first 64K RAM failure |
| 14 | Bit 4 first 64K RAM failure |
| 15 | Bit 5 first 64K RAM failure |
| 16 | Bit 6 first 64K RAM failure |
| 17 | Bit 7 first 64K RAM failure |
| 18 | Bit 8 first 64K RAM failure |
| 19 | Bit 9 first 64K RAM failure |
| 1A | Bit a(10) first 64K RAM failure |
| 1B | Bit B(11) first 64K RAM failure |
| 1C | Bit C(12) first 64K RAM failure |
| 1D | Bit D(13) first 64K RAM failure |
| 1E | Bit E(14) first 64K RAM failure |
| 1F | Bit F(15) first 64K RAM failure |
| 20 | Slave DMA register failure |
| 21 | Master DMA register failure |
| 22 | Master interrupt mask register failure |
| 23 | Slave interrupt mask register failure |
| 25 | Interrupt vector loading in progress |
| 27 | 8042 keyboard controller test failure |
| 28 | CMOS power failure/checksum calculation in progress |
| 29 | CMOS configuration validation in progress |
| 2B | Screen memory test failure |
| 2C | Screen initialization failure |
| 2D | Screen retrace test failure |
| 2E | Search for video ROM in progress |
| 30 | Screen believed running with video ROM |
| 31 | Mono monitor believed operational |
| 32 | Color monitor (40 columns) believed operational |
| 33 | Color monitor (80 columns) believed operational |
| 34 | Timer tick interrupt in progress or failed (non-fatal) |
| 35 | Shutdown failure (non-fatal) |
| 36 | Gate A20 failure (non-fatal) |
| 37 | Unexpected interrupt in protected mode (non-fatal) |
| 38 | Memory high address line failure at 01000-0A000 (non-fatal) |
| 39 | Memory high address line failure at 100000-FFFFFF (non-fatal) |
| 3A | Timer chip counter 2 failed (non-fatal) |
| 3B | Time of day clock stopped |
| 3C | Serial port test |
| 3D | Parallel port test |
| 41 | System board select bad |
| 42 | Extended CMOS RAM bad |
UMC chipset PCI BIOS
| 02 | Verify real mode operation |
| 04 | Get CPU type |
| 06 | Initialize system hardware |
| 08 | Initialize chipset registers with initial POST values |
| 09 | Set in POST flag |
| 0A | Initialize CPU registers |
| 0C | Initialize cache to initial POST values |
| 0E | Initialize I/O |
| 10 | Initialize power management |
| 11 | Load alternate registers with initial POST values |
| 12 | Jump to user patch 0 |
| 14 | Initialize keyboard controller |
| 16 | BIOS ROM checksum |
| 18 | 8254 programmable interrupt timer initialization |
| 1A | 8237 DMA controller initialization |
| 1C | Reset 8259 programmable interrupt controller |
| 20 | Test DRAM refresh |
| 22 | Test 8742 keyboard controller |
| 24 | Set ES segment register to 4GB |
| 26 | Enable address line A20 |
| 28 | Autosize DRAM |
| 2A | Clear 512K base memory |
| 2C | Test 512K base address lines |
| 2E | Test 512K base memory |
| 30 | Test base address memory |
| 32 | Test CPU bus clock frequency |
| 34 | Test CMOS RAM |
| 35 | Test chipset register initialize |
| 36 | Test check resume |
| 37 | Reinitialize the chipset |
| 38 | Shadow system BIOS ROM |
| 39 | Reinitialize the cache |
| 3A | Autosize the cache |
| 3C | Configure advanced chipset registers |
| 3D | Load alternate registers with CMOS values |
| 3E | Read hardware configuration from keyboard controller |
| 40 | Set initial CPU speed |
| 42 | Initialize interrupt vectors |
| 44 | Initialize BIOS interrupts |
| 46 | Check ROM copyright notice |
| 47 | Initialize manager for PCI options ROM’s |
| 48 | Check video configuration against CMOS |
| 49 | Initialize PCI bus and devices |
| 4A | Initialize all video adapters |
| 4C | Shadow video BIOS ROM |
| 4E | Display copyright notice |
| 50 | Display CPU type and speed |
| 52 | Test keyboard |
| 54 | Set key click if enabled |
| 56 | Enable keyboard |
| 58 | Test for unexpected interrupts |
| 5A | Display prompt “Press F2 to Enter Setup” |
| 5C | Test RAM between 512K and 640K |
| 5E | Test base memory |
| 60 | Test expanded memory |
| 62 | Test extended memory address lines |
| 64 | Jump to user patch 1 |
| 66 | Configure advanced cache registers |
| 68 | Enable external and CPU registers |
| 69 | Set up power management |
| 6A | Display external cache size |
| 6C | Display shadow message |
| 6E | Display non-disposable segments |
| 70 | Display error messages |
| 72 | Check for configuration messages |
| 74 | Test real time clock |
| 76 | Check for keyboard errors |
| 7A | Enable keylock |
| 7C | Setup hardware interrupt vectors |
| 7E | Test coprocessor if present |
| 80 | Disable onboard I/O ports |
| 82 | Detect and install external RS232 ports |
| 84 | Detect and install external parallel ports |
| 86 | Reinitialize onboard I/O ports |
| 88 | Initialize BIOS data areas |
| 8A | Initialize extended BIOS data area |
| 8C | Initialize floppy drive controller |
| 8E | Hard disk autotype configuration |
| 90 | Initialize hard disk controller |
| 91 | Initialize local bus hard disk controller |
| 92 | Jump to user patch 2 |
| 94 | Disable A20 address lines |
| 96 | Clear huge ES segment register |
| 98 | Search for option ROM’s |
| 9A | Shadow options ROM’s |
| 9C | Setup power management |
| 9E | Enable hardware interrupts |
| A0 | Set time of day |
| A2 | Check key lock |
| A4 | Initialize typematic rate |
| A8 | Erase F2 prompt |
| AA | Scan for F2 keystroke |
| AC | Enter setup |
| AE | Clear in-POST flag |
| B0 | Check for errors |
| B2 | POST done |
| B4 | One beep |
| B6 | Check password (optional) |
| B8 | Clear global descriptor table |
| BC | Clear parity checkers |
| BE | Clear screen (optional) |
| C0 | Try to boot with interrupt 19 |
| D0 | Interrupt handler error |
| D2 | Unknown interrupt error |
| D4 | Pending interrupt error |
| D6 | Initialize option ROM error |
| D8 | Shutdown error |
| DA | Extended block move |
| DC | Shutdown 10 error |
Phoenix PCI BIOS
| 02 | If the CPU is in protected mode, turn on gate A20 and pulse the reset line. Forces a shutdown 0. |
| 04 | On cold boot, save the CPU type information value in the CMOS |
| 06 | Reset DMA controllers; Disable video; Clear pending interrupts from real time clock; Setup port B register |
| 08 | Initialize chipset control registers to power on defaults |
| 0A | Set a bit in the CMOS that indicates POST; used to determine if the current configuration causes the BIOS to hang. If true, default BIOS values set on next POST |
| 0C | Initialize I/O module control registers |
| 0E | External CPU caches initialized; Cache registers set to default values |
| 10/12/14 | Verify response from 8742 keyboard controller |
| 16 | Verify BIOS ROM checksums to zero |
| 18 | Initialize all three 8254 programmable interrupt timers |
| 1A | Initialize DMA command register; Initialize 8 DMA channels |
| 1C | Initialize 8259 programmable interrupt controller; ICW4 needed; Cascade and edge triggered mode |
| 20 | Test DRAM refresh by polling refresh bit in post B |
| 22 | Test 8742 keyboard controller; Self test send to keyboard controller and awaiting results; Read the switch inputs from the 8742 keyboard controller and write the keyboard controller command byte |
| 24 | Set ES segment register to 4GB |
| 26 | Enable address line A20 |
| 28 | Autosize DRAM |
| 2A | Clear first 64K of RAM |
| 2C | Test RAM address lines |
| 2E | Test first 64K bank of memory by checking chip address line test and RAM test |
| 30/32 | Find true CPU speed (MHz) |
| 34 | Clear CMOS diagnostic byte (register E); Check real time clock and verify battery; Checksum the CMOS and verify for corruption |
| 36/38/3A | External cache is autosized and its configuration for enabling later in POST |
| 3C | Configure advanced cache features; Configure external cache’s configurable parameters |
| 3E | Read hardware configuration from keyboard controller |
| 40 | Set system power-on speed to the rate determined by the CMOS; If the CMOS is invalid, use a lower speed |
| 42 | Initialize interrupt vectors 0-77h to the BIOS general interrupt handler |
| 44 | Initialize interrupt vectors 0-20h to proper values from the BIOS interrupt tables |
| 46 | Check copyright message checksum |
| 48 | Check video configuration |
| 4A | Initialize both monochrome and color graphics video adapters |
| 4C/4E | Display copyright message |
| 50 | Display CPU type and speed |
| 52 | Test for the self-test code if a cold start; Keyboard performs a self-test and sends and AA if successful |
| 54 | Initialize keystroke clicker during POST |
| 56 | Enable keyboard |
| 58 | Test for unexpected interrupts; Check STI for hot interrupts; Test NMI for unexpected interrupts; Enable parity checkers and read from memory checking for unexpected interrupt |
| 5A | Display prompt “Press F2 to Enter Setup” |
| 5C | Determine and test the amount of memory available; Save total size to BIOS variable called bdaMemorySize |
| 5E | Perform address of base memory |
| 60 | Determine and test the amount of extended memory available; Save the total size in the CMOS at CMOSExtended |
| 62 | Perform and address line test on A0 to the amount of memory available |
| 68 | External and CPU caches, if present, are enabled |
| 6A | Display cache size on screen if non-zero |
| 6C | Display BIOS shadow status |
| 6E | Display the starting offset of the non-disposable section of the BIOS |
| 70 | Check flags in CMOS and in the BIOS data area to see if any errors have been detected during the POST |
| 72 | Check status bits for configuration errors |
| 74 | Test real time clock if the battery has lost power |
| 76 | Check status bits for keyboard errors; Errors are displayed |
| 78 | Check for stuck keys on the keyboard; Errors are displayed |
| 7A | Enable keylock |
| 7C | Setup hardware interrupt vectors |
| 7E | Test coprocessor if present |
| 80/82 | Detect and install RS232 ports |
| 84 | Detect and install parallel ports |
| 86/88 | Initialize timeouts/key buffer/soft reset flags |
| 8A | Initialize extended BIOS data area and initialize the mouse |
| 8C | Initialize the floppy disks and display error message if failure was detected |
| 8E | Hard disk autotype detection |
| 90 | If the CMOS RAM is valid and intact and fixed disks are defined, call the fixed disk initialization routine to initialize the fixed disk system and take over the appropriate interrupt vectors |
| 92/94 | Disable gate A20 address line |
| 96/98 | Scan for ROM BIOS extensions |
| 9E | Enable hardware interrupts |
| A0 | Set time of day |
| A2 | Setup numlock indicator |
| A4 | Initialize typematic rate |
| A6 | Initialize hard disk autoparking |
| A8 | Erase F2 prompt |
| AA | Scan for F2 keystroke |
| AC | Check to see if SETUP should executed |
| AE | Clear ConfigFailedBit and InPostBit in CMOS |
| B0 | Check for POST errors |
| B2 | Set/clear status bits to reflect POST complete |
| B4 | One beep |
| B6 | Check for password before boot |
| B8 | Clear global descriptor table |
| BA | Initialize the screen saver |
| BC | Clear parity error latch |
| BE | Clear screen |
| C0 | Try to boot with interrupt 19 |
| D0/D2 | If an interrupt occurs before interrupts vectors have been initialized, interrupt handler will check if 8259 programmable interrupt timer caused the interrupt and which one; If error is unknown, InterruptFlag will be FF, otherwise, it will hold the IRQ number that occurred |
| D4 | Clear pending timer and keyboard interrupts and transfer control to the double word address located at RomCheck |
| D6/D8/DA | Return from extended block move |
Version 3.07 ISA/EISA/MCA
| 01 | CPU register test in progress |
| 02 | CMOS read/write failure |
| 03 | ROM BIOS checksum failure |
| 04 | Programmable interval timer failure |
| 05 | DMA initialization failure |
| 06 | DMA page register write/read failure |
| 08 | RAM refresh verification failure |
| 09 | First 64K RAM test in progress |
| 0A | First 64K RAM chip or data line failure multi-bit |
| 0B | First 64K RAM odd/even logic failure |
| 0C | Address line failure in first 64K RAM |
| 0D | Parity failure in first 64K RAM |
| 0E | Fail-safe timer failure |
| 0F | Software NMI post failure |
| 10 | Bit 0 first 64K RAM failure |
| 11 | Bit 1 first 64K RAM failure |
| 12 | Bit 2 first 64K RAM failure |
| 13 | Bit 3 first 64K RAM failure |
| 14 | Bit 4 first 64K RAM failure |
| 15 | Bit 5 first 64K RAM failure |
| 16 | Bit 6 first 64K RAM failure |
| 17 | Bit 7 first 64K RAM failure |
| 18 | Bit 8 first 64K RAM failure |
| 19 | Bit 9 first 64K RAM failure |
| 1A | Bit A first 64K RAM failure |
| 1B | Bit B first 64K RAM failure |
| 1C | Bit C first 64K RAM failure |
| 1D | Bit D first 64K RAM failure |
| 1E | Bit E first 64K RAM failure |
| 1F | Bit F first 64K RAM failure |
| 20 | Slave DMA register failure |
| 21 | Master DMA register failure |
| 22 | Master interrupt mask register failure |
| 23 | Slave interrupt mask register failure |
| 25 | Interrupt vector loading in progress |
| 27 | Keyboard controller test failure |
| 28 | CMOS power failure; checksum calculation in progress |
| 29 | CMOS RAM configuration validation in progress |
| 2B | Screen memory test failure |
| 2C | Screen initialization failure |
| 2D | Screen retrace test failure |
| 2E | Search for video ROM in progress |
| 30 | Screen believed running with video ROM |
| 31 | Mono monitor believed operational |
| 32 | Color monitor (40 columns) believed operational |
| 33 | Color monitor ( 80 columns) believed operational |
| 34 | No time tick |
| 35 | Shutdown test in progress or failure |
| 36 | Gate A20 failure |
| 37 | Unexpected interrupt in protected mode |
| 38 | Memory high address line failure at 01000-0A000; RAM test in progress or address failure >FFFh |
| 39 | Memory high address line failure at 100000-FFFFFF |
| 3A | Interval timer channel 2 test or failure |
| 3B | Time of day clock test or failure |
| 3C | Serial port test or failure |
| 3D | Parallel port test or failure |
| 3E | Math coprocessor test |
| 3F | Cache test (Dell) |
| 41 | System board select bad (Micro Channel only) |
| 42 | Extended CMOS RAM bad (Micro Channel only) |
Version 4.0
| 02 | Verify real mode |
| 04 | Get CPU type |
| 06 | Initialize system hardware |
| 08 | Initialize chipset registers with initial POST values |
| 09 | Set in POST flag |
| 0A | Initialize CPU registers |
| 0C | Initialize cache to initial POST values |
| 0E | Initialize I/O |
| 10 | Initialize power management |
| 11 | Load alternate registers with initial POST values |
| 12 | Jump to UserPatch0 |
| 14 | Initialize keyboard controller |
| 16 | BIOS ROM checksum |
| 18 | 8254 programmable interrupt timer initialization |
| 1A | 8237 DMA controller initialization |
| 1C | Reset 8254 programmable interrupt timer |
| 20 | Test DRAM refresh |
| 22 | Test 8742 keyboard controller |
| 24 | Set ES segment register to 4GB |
| 28 | Autosize DRAM |
| 2A | Clear 512K base RAM |
| 2C | Test 512K base address lines |
| 2E | Test 512K base memory |
| 32 | Test CPU bus-clock frequency |
| 37 | Reinitialize the chipset |
| 38 | Shadow system BIOS ROM |
| 39 | Reinitialize the cache |
| 3A | Autosize cache |
| 3C | Configure advanced chipset registers |
| 3D | Load alternate registers with CMOS values |
| 40 | Set initial CPU speed |
| 42 | Initialize interrupt vectors |
| 44 | Initialize BIOS interrupts |
| 46 | Check ROM copyright notice |
| 48 | Check video configuration against CMOS |
| 49 | Initialize PCI bus and devices |
| 4A | Initialize all video adapters in system |
| 4C | Shadow video BIOS ROM |
| 4E | Display copyright notice |
| 50 | Display CPU type and speed |
| 52 | Test keyboard |
| 54 | Set key click if enabled |
| 56 | Enable keyboard |
| 58 | Test for unexpected interrupts |
| 5A | Display prompt “Press F2 to Enter Setup” |
| 5C | Test RAM between 512K and 640K |
| 60 | Test expanded memory |
| 62 | Test extended memory address lines |
| 64 | Jump to UserPatch1 |
| 66 | Configure advanced cache registers |
| 68 | Enable external and CPU caches |
| 6A | Display external cache size |
| 6C | Display shadow message |
| 6E | Display non-disposable segments |
| 70 | Display error messages |
| 72 | Check for configuration errors |
| 74 | Test real time clock |
| 76 | Check for keyboard errors |
| 7C | Setup hardware interrupts vectors |
| 7E | Test coprocessor if present |
| 80 | Disable onboard I/O ports |
| 82 | Detect and install external RS232 ports |
| 84 | Detect and install external parallel ports |
| 86 | Re-initialize on-board I/O ports |
| 88 | Initialize BIOS data area |
| 8A | Initialize extended BIOS data area |
| 8C | Initialize floppy controller |
| 90 | Initialize hard disk controller |
| 91 | Initialize local bus hard disk controller |
| 92 | Jump to UserPatch2 |
| 94 | Disable A20 address line |
| 96 | Clear huge ES segment register |
| 98 | Search for option ROM’s |
| 9A | Shadow option ROM’s |
| 9C | Setup power management |
| 9E | Enable hardware interrupts |
| A0 | Set time of day |
| A2 | Check key lock |
| A8 | Erase F2 prompt |
| AA | Scan for F2 keystroke |
| AC | Enter setup |
| AE | Clear in-POST flag |
| B0 | Check for errors |
| B2 | POST done; prepare to boot operating system |
| B4 | One beep |
| B6 | Check password (optional) |
| B8 | clear global descriptor table |
| BC | Clear parity checkers |
| BE | Clear screen (optional) |
| BF | Check virus and backup reminders |
| C0 | Try to boot interrupt 19 |
| D0 | Interrupt handler error |
| D2 | Unknown interrupt error |
| D4 | Pending interrupt error |
| D6 | Initialize option ROM error |
| D8 | Shutdown error |
| DA | Extended block move |
| DC | Shutdown 10 error |
| E2 | Initialize the chipset |
| E3 | Initialize refresh counter |
| E4 | Check for forced flash |
| E5 | Check HW status of ROM |
| E6 | BIOS ROM is ok |
| E7 | Do a complete RAM test |
| E8 | Do OEM initialization |
| E9 | Initialize interrupt controller |
| EA | Read in bootstrap code |
| EB | Initialize all vectors |
| EC | Boot the flash program |
| ED | Initialize the boot device |
| EE | Boot code was read ok |
Version 4.0 release 6.0
| 02 | Verify real mode |
| 03 | Disable non-maskable interrupt (NMI) |
| 04 | Get CPU type |
| 06 | Initialize system hardware |
| 07 | Disable shadow and execute code from the ROM |
| 08 | Initialize chipset with initial POST values |
| 09 | Set IN POST flag |
| 0A | Initialize CPU registers |
| 0B | Enable CPU cache |
| 0C | Initialize caches to initial POST values |
| 0E | Initialize I/O component |
| 0F | Initialize the local bus IDE |
| 10 | initialize power management |
| 11 | Load alternate registers with initial POST values |
| 12 | Restore CPU control word during warm boot |
| 13 | Initialize PCI bus mastering devices |
| 14 | Initialize keyboard controller |
| 16 | BIOS ROM checksum |
| 17 | Initialize cache before memory autosize |
| 18 | 8254 programmable interrupt timer initialization |
| 1A | 8237 DMA controller initialization |
| 1C | Reset programmable interrupt controller |
| 20 | Test DRAM refresh |
| 22 | Test 8742 keyboard controller |
| 24 | Set ES segment register to 4GB |
| 26 | Enable gate A20 line |
| 28 | Autosize DRAM |
| 29 | Initialize POST memory manager |
| 2A | Clear 512KB base RAM |
| 2C | RAM failure on address line xxxx |
| 2E | RAM failure on data bits xxxx of low byte of memory bus |
| 2F | Enable cache before system BIOS shadow |
| 30 | RAM failure on data bits xxxx of high byte of memory bus |
| 32 | Test CPU bus clock frequency |
| 33 | Initialize Phoenix Dispatch Manager |
| 36 | Warm start shut down |
| 38 | Shadow system BIOS ROM |
| 3A | Autosize cache |
| 3C | Advanced configuration of chipset registers |
| 3D | Load alternate registers with CMOS values |
| 41 | Initialize extended memory for RomPilot |
| 42 | Initialize interrupt vectors |
| 45 | POST device initialization |
| 46 | Check ROM copyright notice |
| 47 | Initialize I20 support |
| 48 | Check video configuration against CMOS |
| 49 | Initialize PCI bus and devices |
| 4A | Initialize all video adapters in system |
| 4B | QuietBoot start (optional) |
| 4C | Shadow video BIOS ROM |
| 4E | Display BIOS copyright notice |
| 4F | Initialize MultiBoot |
| 50 | Display CPU type and speed |
| 51 | Initialize EISA board |
| 52 | Test keyboard |
| 54 | Set key click if enabled |
| 55 | Enable USB devices |
| 58 | Test for unexpected interrupts |
| 59 | Initialize POST display service |
| 5A | Display prompt “Press F2 to enter SETUP” |
| 5B | Disable CPU cache |
| 5C | Test RAM between 512KB and 640KB |
| 60 | Test extended memory |
| 62 | Test extended memory address lines |
| 64 | Jump to UserPatch1 |
| 66 | Configure advanced cache registers |
| 67 | Initialize Multi Processor APIC |
| 68 | Enable external and CPU caches |
| 69 | Setup system management mode (SMM) area |
| 6A | Display external L2 cache size |
| 6B | Load custom defaults (optional) |
| 6C | Display shadow area message |
| 6E | Display possible high address for UMB recovery |
| 70 | Display error messages |
| 72 | Check for configuration errors |
| 76 | Check for keyboard errors |
| 7C | Set up hardware interrupt vectors |
| 7D | Initialize Intelligent System Monitoring |
| 7E | Initialize coprocessor if present |
| 80 | Disable onboard super I/O ports and IRQ’s |
| 81 | Late POST device initialization |
| 82 | Detect and install external RS232 ports |
| 83 | Configure non-MCD IDE controllers |
| 84 | Detect and install external parallel ports |
| 85 | Initialize PC compatible PnP ISA devices |
| 86 | Reinitialize onboard I/O ports |
| 87 | Configure motherboard configurable devices (optional) |
| 88 | Initialize BIOS data area |
| 89 | Enable non-maskable interrupts (NMI’s) |
| 8A | Initialize extended BIOS data area |
| 8B | Test and initialize PS/2 mouse |
| 8C | Initialize floppy controller |
| 8F | Determine number of ATA drives (optional) |
| 90 | Initialize hard disk controllers |
| 91 | Initialize local bus hard disk controllers |
| 92 | Jump to UserPatch2 |
| 93 | Build MPTABLE for multi processor boards |
| 95 | Install CD ROM for boot |
| 96 | Clear huge ES segment register |
| 97 | Fixup multi processor table |
| 98 | Search for option ROM’s |
| 99 | Check for SMART drive (optional) |
| 9A | Shadow option ROM’s |
| 9C | Set up power management |
| 9D | Initialize security engine (optional) |
| 9E | Enable hardware interrupts |
| 9F | Determine number of ATA and SCSI drives |
| A0 | Set time of day |
| A2 | Check key lock |
| A4 | Initialize typematic rate |
| A8 | Erase F2 prompt |
| AA | Scan for F2 key stroke |
| AC | Enter setup |
| AE | Clear boot flag |
| B0 | Check for errors |
| B1 | Inform RomPilot about the end of POST |
| B2 | POST done – prepare to boot operating system |
| B4 | One short beep |
| B5 | Terminate QuietBoot (optional) |
| B6 | Check password |
| B7 | Initialize ACPI BIOS |
| B9 | Prepare boot |
| BA | Initialize DMI parameters |
| BB | Initialize PnP option ROM’s |
| BC | Clear parity checkers |
| BD | Display multiboot menu |
| BE | Clear screen |
| BF | Check virus and backup reminders |
| C0 | Try to boot with interrupt 19 |
| C1 | Initialize POST Error Manager (PEM) |
| C2 | Initialize error logging |
| C3 | Initialize error display function |
| C4 | Initialize system error handler |
| C5 | PnP dual CMOS (optional) |
| C6 | Initialize notebook docking (optional) |
| C7 | Initialize notebook docking late |
| C8 | Force check (optional) |
| C9 | Extended checksum (optional) |
| CA | Redirect Int 15h to enable remote keyboard |
| CB | Redirect Int 13 to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk |
| CC | Redirect Int 10h to enable remote serial video |
| CD | Re-map I/O and memory for PCMCIA |
| CE | Initialize digitizer and dispaly message |
| D2 | Unknown interrupt |
| The following are for boot block in Flash ROM | |
| E0 | Initialize the chipset |
| E1 | Initialize the bridge |
| E2 | Initialize the CPU |
| E3 | Initialize the system timer |
| E4 | Initialize system I/O |
| E5 | Check force recovery boot |
| E6 | Checksum BIOS ROM |
| E7 | Go to BIOS |
| E8 | Set Huge Segment |
| E9 | Initialize Multi Processor |
| EA | Initialize OEM special code |
| EB | initialize PIC and DMA |
| EC | Initialize Memory type |
| ED | Initialize Memory size |
| EE | Shadow Boot Block |
| EF | System memory test |
| F0 | Initialize interrupt vectors |
| F1 | Initialize Run Time Clock |
| F2 | Initialize video |
| F3 | Initialize System Management Menager |
| F4 | Output one beep |
| F5 | Clear Huge Segement |
| F6 | Boot to mini DOS |
| F7 | Boot to Full DOS |
POST procedures
| CPU | Check internal operations i.e. ALE/IRQ status, Request, LA and memory read/write |
| CMOS RAM | Test with walking bit pattern |
| ROM BIOS | Perform checksum on ROM BIOS where all bits are added and compared to a factory set total |
| PIT | Check to ensure interrupt requests are properly executed |
| DMA | Check DMA from CPU to memory without BIOS. Also check page registers |
| Base 64K | Check first 4K block |
| Serial and Parallel Ports | I/O data areas for any devices found are assigned but are not tested |
| PIC | Check that proper interrupt request levels are addressed |
| Keyboard Controller | Check 8240 for proper operation, including scan code response and Gate A20 which allows CPU operation in protected mode |
| CMOS | Check data within CMOS and compare to BIOS information. Failure of the extended area is often due to wrong data setup. Constant failure after resetting CMOS is either battery CMOS chip or RTC |
| Video Controller | Test and initialize controller and ROM on the video adapter |
| RTC | Check to ensure proper frequencies are on proper lines for the Video Color CPU and DMA frequency. Check RTC and PIT or the system crystal if a failure occurs |
| CPU | Return from protected mode. CPU is put into protected mode and returns to the POST at the point indicated by the CMOS ROM data area byte 0F. Failure here is normally due to the CPU, keyboard controller, CMOS chip or an address line |
| PIC | Test counter 2 |
| NMI | Check for non maskable interrupt request vector for active status. Failure is normally due to the CMOS but could also be the BIOS IRQ or CPU chips |
| Keyboard | Check for NumLock and/or Caps and Shift keys |
| Mouse | Initialize through the keyboard controller. This is only done if a mouse is present and it is initialized in this way |
| RAM Above 64K | Test in 64KB blocks with a walking bit pattern and parity enabled |
| Fixed and Floppy Controllers | Test for proper response to BIOS calls |
| Shadow RAM Areas | Look in CMOS for settings on which adapter or system ROM’s are to be shadowed |
| Option ROM | Look for ROM signatures of 55AA in extended memory then initialize the ROM and halt testing while internal checks are carried out |
| External Cache | Check controller chip for external cache |
| CPU Internal Cache | The CPU’s internal cache is tested |
| Hardware Interrupts | Initialize and test video, floppy, hard I/O adapters, serial and parallel ports |
| Cassette | Test internal or external cassette drives |
| Boot Code Errors | Errors occurring after this point are normally a corrupt boot record |
Text error messages
| Diskette drive A error | Drive A: is present but fails the POST diskette tests. Check that the drive is defined with the proper diskette type in Setup and that the disk is installed correctly |
| Extended RAM failed at offset: nnn | Extended memory not working or not configured properly at offset: nnn |
| Failing Bits: nnnn | The hexadecimal number nnnn is a map of the bits at the RAM address that failed the memory test. Each 1 in the map indicates a failed bit |
| Fixed Disk 0 Failure | Fixed disk is not working or not configured properly. Check to see if fixed disk is installed properly. Run Setup to be sure the fixed disk type is correctly identified |
| Fixed Disk 1 Failure | Fixed disk is not working or not configured properly. Check to see if fixed disk is installed properly. Run Setup to be sure the fixed disk type is correctly identified |
| Fixed Disk Controller Failure | Fixed disk is not working or not configured properly. Check to see if fixed disk is installed properly. Run Setup to be sure the fixed disk type is correctly identified |
| Incorrect Drive A: type – run Setup | Type of diskette for drive A: not correctly identified in Setup |
| Invalid NVRAM media type | Problem with NVRAM (CMOS) access |
| Keyboard controller error | The keyboard controller failed test. Try replacing the keyboard |
| Keyboard error | Keyboard not working |
| Keyboard error nn | BIOS discovered a stuck key and displays the scan code nn for the stuck key |
| Keyboard locked – Unlock key switch | Unlock the system to proceed |
| Monitor type does not match CMOS – Run Setup | Monitor type not correctly identified in Setup |
| Operating system not found | Operating system cannot be located on either A: or C:. Enter Setup and see if fixed disk and drive A: are properly identified |
| Parity Check 1 | Parity error found in the system bus. BIOS attempts to locate the address and display it on screen. If it cannot locate the address, it displays ??? |
| Parity Check 2 | Parity error found in the I/O bus. BIOS attempts to locate the address and display it on screen. If it cannot locate the address, it displays ??? |
| Press <F1> to resume, <F2> to Setup | Displayed after any recoverable error message. Press F1 to start the boot process or F2 to enter Setup and change any settings |
| Real-time clock error | Real-time clock fails BIOS test. Might require motherboard repair |
| Shadow RAM failed at offset: nnnn | Shadow RAM failed at offset nnnn of the 64KB block at which the error was detected |
| System battery is dead – Replace and run Setup | The CMOS clock battery indicator shows the battery is dead. Replace the battery and run Setup to reconfigure the system |
| System cache error – Cache disabled | RAM cache failed the BIOS test. BIOS disabled the cache |
| System CMOS checksum bad – run Setup | System CMOS RAM has been corrupted or modified incorrectly. Perhaps by an application program that changes data stored in CMOS. Run Setup and reconfigure the system either by getting the default values or making your own selections |
| System RAM failed at offset: nnnn | System RAM failed at offset nnnn of the 64KB block at which the error was detected |
| System timer error | The timer test failed. Requires repair of system motherboard |